Altera University Program Flash Memory Demos
How To Program Flash
This design example consists only of the hardware design for use with a compatible operating system that supports memory management unit (MMU). The hardware section consists of the Nios ® II/f core with MMU enabled with the reset vector pointing to the flash memory and exception vector that points to the DDR3 memory.You can use this design as a starting point to build your own MMU-enabled Nios II processor systems.